High dynamic range radio architecture with enhanced image rejection

ABSTRACT

A circuit for down-converting an RF signal to a baseband signal includes a trans-admittance amplifier adapted to receive the RF signal and generate in response a pair of differential current signals. The circuit further includes a trans-impedance amplifier having at least four mixers and at least four linear amplifiers. The four mixers frequency down-convert the pair of differential current signals to generate four pairs of differential baseband current signals, wherein each pair of the differential baseband current signals has a different phase and is associated with each of the linear amplifiers. Additionally, the circuit includes a summing block that generates an in-phase signal using a first weighted sum of the four different baseband current signals and a quadrature signal using a second weighted sum of the four different baseband current signals. The circuit further includes an analog-to-digital converter for converting the in-phase and quadrature signals to respective digital representations.

CROSS-REFERENCES TO RELATED APPLICATIONS

The present application claims benefit under 35 USC 119(e) of U.S.provisional application No. 61/292,417, filed Jan. 5, 2010, entitled“Cerberus Radio,” the content of which is incorporated herein byreference in its entirety.

BACKGROUND OF THE INVENTION

The present invention relates to communication systems, and moreparticularly to a high-linearity low-noise radio.

Generally, a radio uses one or more mixers to down-convert a radiofrequency (RF) signal to a baseband signal. A problem with aconventional mixer used in a down-converter is that it generatesunwanted harmonics, such as third and fifth harmonics. These harmonicsmay disturb the radio sensitivity, cause distortion in the RF signal,and/or cause electromagnetic interference. Accordingly, there is a needfor improved circuits and methods to eliminate or at least reduce theseharmonics.

BRIEF SUMMARY OF THE INVENTION

Embodiments of the present invention provide circuits and methods foreliminating or reducing harmonics in a radio. An embodiment of thepresent invention provides a circuit for down-converting an RF signal toa baseband signal. The circuit includes a trans-admittance amplifieradapted to receive the RF signal and generate in response a pair ofdifferential current signals. The circuit further includes atrans-impedance amplifier that comprises at least four mixers and atleast four linear amplifiers. The at least four mixers frequencydown-convert the pair of differential current signals to generate fourpairs of differential baseband current signals, wherein each pair of thedifferential baseband current signals has a different phase and isassociated with each of the linear amplifiers. Additionally, the circuitincludes a summing block that generates an in-phase signal using a firstweighted sum of the four different baseband current signals and aquadrature signal using a second weighted sum of the four differentbaseband current signals.

In an alternative embodiment, a circuit for reducing harmonics in areceived signal includes a trans-admittance amplifier adapted to receivean RF signal and generate in response a pair of differential currentsignals. The circuit further includes a trans-impedance amplifier thatcomprises at least four mixers and at least four linear amplifiers. Theat least four mixers frequency down-convert the pair of differentialcurrent signals to generate four pairs of differential baseband currentsignals, wherein each pair of the differential baseband current signalshas a different phase and is associated with one of the linearamplifiers. Additionally, the circuit includes a summing block thatgenerates an in-phase harmonic signal using a first weighted sum of atleast a first three of the four different baseband current signals and aquadrature harmonic signal using a second weighted sum of at least asecond three of the four different baseband current signals. The circuitadditionally includes an analog-to-digital converter module thatconverts the in-phase and quadrature harmonic signals to respectivedigital representation. The circuit also includes a digital processingunit adapted to eliminate or at least reduce the harmonics of one of thedifferential baseband current signals based on the in-phase andquadrature harmonic signals using a least mean squares algorithm.

In another embodiment of the present invention, a method for providing abaseband signal having reduced harmonics includes receiving an RF signaland generating in response a pair of differential current signals. Themethod further includes frequency down-converting the pair ofdifferential current signals and generating four pairs of differentialbaseband current signals. The method also includes generating anin-phase signal using a first weighted sum of the four pairs ofdifferential baseband current signals and generating a quadrature signalusing a second weighted sum of the four pairs of differential basebandcurrent signals.

In yet another embodiment of the present invention, a method forproviding a baseband signal having reduced harmonics includes receivingan RF signal and generating in response a pair of differential currentsignals. The method further includes frequency down-converting the pairof differential current signals and generating four pairs ofdifferential baseband current signals. The method also includesgenerating an in-phase harmonic signal using a first weighted sum of atleast a first three of the four pairs of differential baseband currentsignals and generating a quadrature harmonic signal using a secondweighted sum of at least a second three of the four pairs ofdifferential baseband current signals. The method additionally includescanceling harmonics in the baseband based on the in-phase and quadratureharmonic signals. In a specific embodiment, the canceling includes theuse of a least mean squares algorithm.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are incorporated herein and form a partof the specification, illustrate the present invention and, togetherwith the description, further serve to explain embodiments of theinvention.

FIG. 1 is a block diagram illustrating a high linearity low noise radiocircuit according to an embodiment of the present invention; and

FIG. 2 is a simplified block diagram illustrating a high linearity lownoise circuit according to an alternative embodiment of the presentinvention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is a block diagram of a radio 100 according to one exemplaryembodiment of the present invention. Radio 100 is shown as including, inpart, a wide-band low-noise trans-admittance amplifier 120 thatgenerates differential output currents I_(LNA+) and I_(LNA−). In anembodiment, the low-noise trans-impedance amplifier includes a low-noiseamplifier 124 having a feedback resistor 122 disposed across its inputand output terminals. The feedback resistor is used to provide therequired input termination resistance. The low-noise trans-admittanceamplifier further includes a gain stage 126 capacitively coupled to theoutput terminal of the amplifier 124. The low-noise trans-admittanceamplifier also includes a gain stage 128 that is capacitively coupled tothe input terminal of the amplifier 124. In an embodiment, the noiseintroduced by amplifier 124 has the same polarity at the outputs of gainstages 126 and 128. This noise is then canceled at the outputs of gainstages 126 and 128 due to the common mode rejection of a followingstage.

Radio 100 also includes a trans-impedance amplifier 150 coupled to thetrans-admittance amplifier. In an embodiment, the trans-impedanceamplifier includes at least four mixers 162, 164, 166, 168 that areconfigured to receive the differential current signals I_(LNA+),I_(LNA−) from the low-noise trans-admittance amplifier 120 and frequencydown-convert them to at least four respective differential outputsignals 172, 174, 176, 178. Each of the four output signals are coupledto one of the four respective amplifiers 152, 154, 156, 158. In anembodiment, each of the amplifiers is a wide bandwidth amplifier havinga differential output and a programmable gain that is digitallycontrolled. In an embodiment, the bandwidth of the amplifiers may be 4MHz and higher.

In an embodiment of the present invention, the differential currentsignals supplied by low noise trans-admittance amplifier 120 remain inthe current domain as their frequency is down-converted by mixers 162,164, 166 and 168 and as they are amplified by amplifiers 152, 154, 156,and 158, to generate signals TZ₀, TZ₄₅, TZ₉₀, TZ₁₃₅, thereby improvingthe linearity of the low noise trans-admittance amplifier and themixers. In the embodiment, each of the TZ₀, TZ₄₅, TZ₉₀, TZ₁₃₅ signals isshown as being a differential signal having a differentially positiveand a differentially negative signal component. Radio 100 furtherincludes a summation block 180 that is coupled to the amplifiers 152,154, 156, and 158. In an embodiment, the summation block includes afirst summing amplifier 182 and a second summing amplifier 184. Each ofthe summing amplifiers receives the TZ₀, TZ₄₅, TZ₉₀, TZ₁₃₅ signals andgenerates a weighted sum of the signals TZ₀, TZ₄₅, TZ₉₀, TZ₁₃₅ togenerate an in-phase (I) signal and a quadrature (Q) signal.

Radio 100 further includes an oscillator circuit 190 that provides areference signal 191 to a multi-phase signal generator 192. In anembodiment, the local oscillator may be a frequency synthesizer and themulti-phase signal generator may include multiple divider by 2 circuitsand produces digital signals having the same frequency but differentphases for the four mixers 162, 164, 166, 168. In another embodiment,the multi-phase clock generator may be poly-phase filters that mayinclude resistive and capacitive components to produce sinusoidalsignals having the same frequency but different phases for the mixers.In yet another embodiment, the multi-phase signal generator 192 maybeintegrated within the oscillator circuit.

In an embodiment, each mixer uses a 12.5% duty cycle non-overlappingclock to provide four differential baseband outputs. These differentialoutputs may be described as samples of the RF waveform at four differentoscillation phases—0, 45, 90 and 135 degrees. In a conventionaldown-converter only quadrature outputs at phases of 0° and 90°, called Iand Q signals respectively, are available. In accordance with thepresent invention, however, a weighted sum of four phases are used togenerate the I and Q signals.

In accordance with one embodiment of the present invention, the I and Qsignals are generated using the weighted sum as shown in Equations (1)and (2) below, each with harmonic rejection of the 3^(rd) and 5^(th)harmonics at the RF input.

I=TZ ₀+(√2+1)TZ ₄₅+(√2+1)TZ ₉₀ +TZ ₁₃₅  (1)

Q=(√2+1)TZ ₀ +TZ ₄₅ +TZ ₉₀+(√2+1)TZ ₁₃₅  (2)

Numerically, the in-phase signal I comprises 1×TZ₀, 2.41 (√2+1)×TZ₄₅,2.41×TZ₉₀, and 1×TZ₁₃₅. Similarly, the quadrature signal Q comprises2.41×TZ₀, 1×TZ₄₅, 1×TZ₉₀, and 2.41×TZ₁₃₅.

In an embodiment, the summation block 180 is shown as having a bi-quadgain stage that generates the final I and Q signals. The presence of theop-amp with virtual ground node provides a convenient summing node.Scaling of the baseband outputs is achieved by selecting the appropriateresistors in the trans-impedance amplifier 150. In an embodiment, thecomposite frequency response of the real pole in the trans-impedanceamplifier 150 and the pair of complex poles is a third order Butterworthfilter. As is seen from the above description, the signals remain in thecurrent domain even while being frequency down-converted all the waydown to the baseband region of operation.

Additionally, radio 100 includes a digital-to-analog converter stagethat converts the I and Q signals to a digital representation to provideto a digital front end (DFE) for further processing.

Additional Harmonic Rejection Using LMS

The four signals at the output of trans-impedance amplifier 150 carry anestimate of the desired signals and the unwanted signals at harmonics ofthe RF frequency. As described above, a weighted sum of these signals isused in accordance with the present invention to provide estimates ofthe desired I and Q signals.

In an alternative embodiment of the present invention, another weightedsum of the output signals of trans-impedance amplifier 150 is used toprovide estimates of the signal at the 3^(rd) or 5^(th) harmonic. In oneexemplary embodiment, the 3^(rd) or 5^(th) harmonics are obtained usingthe following expression:

I _(harm) =TZ ₃₁₅−√2TZ ₀ +TZ ₄₅  (3)

Q _(harm) =TZ ₄₅−√2TZ ₉₀ TZ ₁₃₅  (4)

These signals can be digitized in a relatively simple Analog-to-digitalconverter (ADC) to generate a digital representation of the complexsignal at the harmonic frequency. Using this complex signal as areference, a least mean square (LMS) algorithm may then be used todetect and cancel the signal leaking into the main path. In one exampleembodiment, at least a 20 dB improvement in 3^(rd) and 5^(th) harmonicrejection is achieved.

FIG. 2 is a schematic diagram of a radio 200 according to an alternativeembodiment of the present invention. Radio 200 includes a widebandlow-noise trans-admittance amplifier 120 configured to receive an RFsignal and produce a pair of differential current signals I_(LNA+) andI_(LNA−). Radio 200 also includes a trans-impedance amplifier 150coupled to the trans-admittance amplifier. In an embodiment, thetrans-impedance amplifier includes at least four mixers 162, 164, 166,168 that are configured to receive the differential currents from thelow-noise trans-admittance amplifier 120 and frequency down-convert themto at least four respective differential output signals 172, 174, 176,178. Each of the four output signals are coupled to one of the fourrespective amplifiers 152, 154, 156, 158. Each of the four amplifiersprovides a respective pair of differential signals TZ₀, TZ₄₅, TZ₉₀,TZ₁₃₅. The trans-admittance amplifier and the trans-impedance amplifiershave been described in sections above and will not be further explainedfor sake of brevity.

Radio 200 further includes a local oscillator 190 configured to producea reference frequency signal 191 to a multi-phase generator 192 thatgenerates multiple clock signals having the same frequency but withdifferent phases. In an embodiment of the present invention, multi-phasegenerator 192 will be implemented using divide-by-2 circuits known toone of skill in the art to produce the four differential output signalsat four different phases (0, 180), (45, 225), (90, 270), and (135, 315).

Radio 200 includes a summing block 260 that generate an in-phaseharmonic signal 272 and a quadrature harmonic signal 274. In anembodiment, summing block 260 includes a summing amplifier 262 thatgenerates the in-phase harmonic signal in accordance with Equation (3)and a summing amplifier 264 that generates the quadrature harmonicsignal 274 in accordance with Equation (4) and using the output signalsof trans-impedance amplifier 150.

Radio 200 also includes an analog-to-digital converter block 290 thatconverts the in-phase and quadrature harmonic signals and at least oneof the four pairs of differential baseband current signals to theirrespective digital representations. In a specific embodiment, the atleast one of the four pairs of differential baseband current signals maybe the one that has the differential phases (0, 180) as shown in FIG. 2.The at least one of the four pairs of different baseband current signalsmay contain harmonics that can be eliminated based on the in-phase andquadrature harmonic signals in a subsequent digital front end (DFE)module. In a specific embodiment, the elimination of the harmonics inthe baseband current signals may use a least mean squares algorithm todetect and cancel the harmonics as described in sections above.

Many alternatives, modifications, and variations will be apparent tothose skilled in the art in light of the above teachings. For example,the detection and cancellation of the harmonics may use other algorithmsthan the disclosed LMS algorithm. The weighted sum may also use otherhardware summing circuits other than the shown summing amplifiers. Thedifference phases may be generated differently from the disclosedembodiments of the present invention.

The above embodiments of the present invention are illustrative and notlimiting. Various alternatives and equivalents are possible. Theinvention is not limited by the type of integrated circuits in which thepresent disclosure may be disposed. Other additions, subtractions ormodifications are obvious in view of the present invention and areintended to fall within the scope of the appended claims.

1. A circuit comprising: a trans-admittance amplifier receiving an RFsignal and generating in response a pair of differential currentsignals; a trans-impedance amplifier comprising at least four mixers andat least four linear amplifiers, the at least four mixersdown-converting a frequency of the received pair of differential currentsignals to generate four pairs of differential baseband current signalseach having a phase corresponding to a different phase of a localoscillator signal; each linear amplifier being associated with adifferent one of the four pairs of differential baseband currentsignals; and a summing block adapted to: generate an in-phase signalusing a first weighted sum of the four differential baseband currentsignals; and generate a quadrature phase signal using a second weightedsum of the four differential baseband current signals.
 2. The circuit ofclaim 1, wherein a first one of the four pairs of the differentialbaseband current signal has a phase of 0 degree with respect to thelocal oscillator signal, wherein a second one of the four pairs of thedifferential baseband current signal has a phase of 45 degrees withrespect to the local oscillator signal, wherein a third one of the fourpairs of the differential baseband current signal has a phase of 90degrees with respect to the local oscillator signal, wherein a fourthone of the four pairs of the differential baseband current signal has aphase of 135 degrees with respect to the local oscillator signal.
 3. Thecircuit of claim 2, wherein each mixer receives a 12.5% duty cyclenon-overlapping clock to provide one pair of differential basebandcurrent signals.
 4. The circuit of claim 1, wherein the generatedin-phase signal using the first weighted sum of the four differentialbaseband current signals is based on the following formula:TZ₀+(√2+1)TZ₄₅+(√2+1)TZ₉₀+TZ₁₃₅.
 5. The circuit of claim 1, wherein thegenerated quadrature signal using the second sum of the fourdifferential baseband current signals is based on the following formula:(√2+1)TZ₀ +TZ ₄₅+TZ₉₀+(√2+1)TZ₁₃₅.
 6. The circuit of claim 1, whereinthe trans-admittance amplifier comprises: a low-noise amplifier havingan input terminal and an output terminal; a first gain stage having afirst input capacitively coupled to the output terminal and a firstoutput; and a second gain stage having a second input capacitivelycoupled to the input terminal and a second output; wherein noises of thelow-noise amplifier that appear at the first and second outputs arecanceled by a common-mode rejection of the trans-impedance amplifier. 7.A circuit for reducing harmonics in a received signal comprising: atrans-admittance amplifier receiving an RF signal and generating inresponse a pair of differential current signals; a trans-impedanceamplifier comprising at least four mixers and at least four linearamplifiers, the at least four mixers down-converting a frequency of thereceived pair of differential current signals to generate four pairs ofdifferential baseband current signals each having a phase correspondingto a different phase of a local oscillator signal; each linear amplifierbeing associated with a different one of the four pairs of differentialbaseband current signals; and a summing block adapted to: generate anin-phase harmonic signal using a first weighted sum of at least a firstthree of the differential baseband current signals; and generate aquadrature harmonic signal using a second weighted sum of at least asecond three of the differential baseband current signals; and aprocessing unit configured to process the harmonics in at least one ofthe differential baseband signals based on the generated in-phase andquadrature harmonic signals.
 8. The circuit of claim 7, wherein thetrans-admittance amplifier comprises: a low-noise amplifier having aninput terminal and an output terminal; a first gain stage having a firstinput capacitively coupled to the output terminal and a first output;and a second gain stage having a second input capacitively coupled tothe input terminal and a second output; wherein noises of the low-noiseamplifier that appear at the first and second outputs are canceled by acommon-mode rejection of the trans-impedance amplifier.
 9. The circuitof claim 7 further comprising: an analog-to-digital converter moduleconfigured to convert the at least one of the differential basebandsignals and the in-phase and quadrature harmonic signals to respectivedigital representations.
 10. The circuit of claim 7, wherein theprocessing unit comprises a digital signal processor configured toeliminate the harmonics out of the at least one of the differentialbaseband signals using a least means squares algorithm.
 11. The circuitof claim 7 further comprising: a local oscillator including amulti-phase signal generator configured to produce a plurality ofsignals having a same frequency and different phases, wherein each ofthe plurality of signals is associated with one of the four mixers. 12.The circuit of claim 11, wherein the multi-phase signal generatorcomprises digital circuits.
 13. The circuit of claim 7, wherein thein-phase harmonic signal is generated based on the following formula:TZ₃₁₅−√2TZ₀+TZ₄₅.
 14. The circuit of claim 7, wherein the quadratureharmonic signal is generated based on the following formula:TZ₄₅−√2TZ9₀+TZ₁₃₅.
 15. The circuit of claim 7, wherein each of the atleast four mixers receives a 12.5% duty cycle non-overlapping clock toprovide one pair of differential baseband current signals.
 16. A methodfor providing a baseband signal having reduced harmonics comprising:receiving an RF signal; generating a pair of differential currentsignals in response to the received RF signal; frequency down-convertingthe pair of differential current signals using at least four mixers forproducing four pairs of differential baseband current signals, eachhaving a different phase with regard to a local oscillator signal;generating an in-phase signal using a first weighted sum of the fourpairs of differential baseband current signals; and generating aquadrature signal using a second weighted sum of the four pairs ofdifferential baseband current signals.
 17. The method of claim 16further comprising: generating a plurality of signals having a samefrequency and different phases, wherein each of the plurality of signalsis associated with one of the four mixers.
 18. The method of claim 16,wherein each of the at least four mixers receives a 12.5% duty cyclenon-overlapping clock to provide one pair of differential basebandcurrent signals.
 19. The method of claim 16, wherein the generating anin-phase signal is based on the following formula:TZ₀+(√2+1)TZ₄₅+(√2+1)TZ₉₀+TZ₁₃₅.
 20. The method of claim 16, wherein thegenerating an in-phase signal is based on the following formula:(√2+1)TZ₀+TZ₄₅+TZ₉₀+(√2+1)TZ₁₃₅.
 21. A method for providing a basebandsignal having reduced harmonics comprising: receiving an RF signal;generating a pair of differential current signals in response to thereceived RF signal; frequency down-converting the pair of differentialcurrent signals using at least four mixers for producing four pairs ofdifferential baseband current signals, each having a different phasewith regard to a local oscillator signal; generating an in-phaseharmonic signal using a first weighted sum of a first three of the fourpairs of differential baseband current signals; and generating aquadrature harmonic signal using a second weighted sum of a second threeof the four pairs of differential baseband current signals; and reducingharmonics in at least one of the differential baseband signals based onthe generated in-phase and quadrature harmonic signals.
 22. The methodof claim 21, wherein the generating an in-phase harmonic signal is basedon the following formula:TZ₃₁₅−√2TZ₀+TZ₄₅.
 23. The method of claim 21, wherein the generating anquadrature harmonic signal is based on the following formula:TZ₄₅−√2TZ9₀+TZ₁₃₅.